This invention relates to phase change memory devices.
Phase change based memory materials, such as chalcogenide-based materials and similar materials, can be caused to change phase between an amorphous phase and a crystalline phase by application of electrical current at levels suitable for implementation in integrated circuits. The generally amorphous phase is characterized by higher electrical resistivity than the generally crystalline phase, which can be readily sensed to indicate data. These properties have generated interest in using programmable resistive material to form nonvolatile memory circuits, which can be read and written with random access.
The change from the amorphous phase to the crystalline phase, referred to as set herein, is generally a lower current operation. Generally, a current pulse for a set operation has a magnitude that is not sufficient to melt the active region of a cell, but heats the active region to a transition temperature at which amorphous phase change material tends to change to a crystalline solid phase. The change from crystalline phase to amorphous phase, referred to as reset herein, is generally a higher current operation, which includes a short high current density pulse to melt or breakdown the crystalline structure. The reset pulse generally has a short duration and quick fall time, so that the phase change material cools quickly, quenching the phase change process and allowing at least a portion of the phase change material to stabilize in an amorphous solid phase. The magnitude of the current needed for reset can be reduced by reducing the size of the phase change material element in the cell and/or the contact area between electrodes and the phase change material, such that higher current densities are achieved with small absolute current values through the phase change material element.
One limitation on applications of phase change memory arises from the fact that phase transitions are caused by heat. Thus, heat in an environment in which the chip is deployed can cause loss of data, and loss of reliability.
Also, this limitation to use in environments that do not expose the chips to heat creates another limitation on applications of the technology. Specifically, the chip may be mounted onto and electrically connected to circuitry in a substrate (such as a package substrate, or a printed circuit board, for example), in a surface mount operation or other mounting process that involves a thermal cycle. For example, the surface mount operation typically includes a solder reflow procedure, requiring that the assembly (including the chip) be heated to bring the solder to a temperature about the melting point (or the eutectic point) of the alloy constituting the solder. Other mounting procedures also involve thermal cycles subjecting the chip to high temperatures. This may result in a change in the resistance of the material in these cells, so that the cell is no longer read as programmed.
For this reason, prior art phase change memory chips have not been available that are capable of retaining a data set stored before the mounting process. So, board manufacturers are required to store any necessary code on the chip, after assembly of the circuit board or after assembly of a system including the circuit board. This makes phase change memory devices less desirable than other types of non-volatile memory for many uses.
It is desirable to provide a phase change memory chip that can be used in extreme operating environments. It is desirable to provide a phase change memory chip that can be coded prior to mounting on a circuit board, using a process that retains the data during thermal cycles encountered during board or assembly manufacturing.